NASA's next-generation spaceflight processor is showing results that exceed design targets by a factor of five. Testing at the Jet Propulsion Laboratory, which began in February 2026, indicates the High Performance Spaceflight Computing chip is operating at 500 times the performance of the radiation-hardened processors currently flying on NASA missions. The original specification called for 100x.
The gap this closes is enormous. NASA's existing fleet still depends on the RAD750, a radiation-hardened processor released in 2001 and based on the PowerPC 750. It powers spacecraft ranging from the Perseverance rover to the James Webb Space Telescope. The chip is reliable and famously tough, but it clocks in at 200 MHz and processes around 266 MIPS. That was respectable when the original iMac shipped with the same architecture. Today it is a bottleneck.
Why Space Processors Are Stuck in the Past
Radiation is the reason. High-energy particles from solar wind and cosmic rays can flip bits, corrupt memory, and trigger errors that force a spacecraft into safe mode. Commercial chips optimized for speed would fail quickly in that environment. So NASA keeps flying decades-old hardware because it has been proven to survive years in deep space.
The HPSC, built by Microchip Technology under a $50 million contract awarded in 2022, is designed to change that calculus. It packs a complete system-on-a-chip into a package small enough to fit in your palm: central processing units, memory, networking, computational accelerators, and I/O interfaces. The architecture uses a 64-bit RISC-V instruction set and includes Time Sensitive Networking support for real-time data handling.
The Autonomy Opportunity
The real prize is what that performance unlocks. Current missions demand constant ground intervention because onboard computing cannot handle complex decision-making in real time. A Mars rover cannot react instantly to terrain hazards. A landing sequence requires intensive data processing that strains systems designed 30 years ago.
NASA says the HPSC will enable spacecraft to run artificial intelligence models that can analyze environments, navigate hazards, and respond to unexpected situations without waiting for human input. That matters when you are operating a spacecraft billions of miles from the nearest network connection. Light-speed delays to Neptune, for instance, can exceed four hours each way.
The processor passed Critical Design Review in 2024 and achieved tape-out last year. First chips came off the fab line shortly after, and the February 2026 test campaign kicked off with engineers sending an email via the HPSC bearing the subject line "Hello Universe." Testing will continue for several months, covering radiation exposure, thermal cycling, shock, and high-fidelity landing scenarios drawn from past NASA missions.
What Comes Next
Once the chip earns spaceflight certification, NASA intends to integrate it across Earth orbiters, planetary rovers, crewed habitats, and deep-space missions through 2040 and beyond. Samples have already gone to early access partners in the defense and commercial aerospace sectors. Microchip plans to adapt the technology for aviation and automotive applications on Earth, where similar demands for fault tolerance and edge AI processing apply.
The RAD750's successor is also arriving at a moment when the compute requirements for AI-driven systems are scaling rapidly. A processor that looked comfortable handling generational improvements could find itself stretched thin if autonomy goals keep climbing. Still, 500x over the current standard is a significant runway.
JPL project manager Jim Butler noted the team is simulating real-world performance using landing scenarios that would normally require power-intensive dedicated hardware. If those tests hold, future missions may finally carry computers capable of genuine independent thought.
